Semiconductor devices are frequently used to switch currents in power electronic circuits. These devices normally contain PN junctions or diodes which can be driven into forward conduction or into avalanche breakdown by any voltage spikes which occur in the circuit. One common type of switching device, for example, is the power MOSFET, which has been discussed extensively in the literature since about 1980. Any MOSFET which has a normal source-body short contains a parasitic PN diode at the junction between its drain and body regions. The parasitic diode is often referred to as an "anti-parallel" diode since it is parallel to the current path through the channel of the MOSFET but is oriented such that it is normally reverse-biased.
The anti-parallel diode in a power MOSFET can become forward-biased in several ways. For example, an electrostatic discharge (ESD) in the circuit may cause this to happen. Moreover, in numerous power electronic circuits, an inductance in a path of large current flow produces rapid changes in voltage across its terminals as the inductance attempts to resist any changes in the magnitude of the current flowing through it. The well-known equation V.sub.L =L dI/dt describes this phenomenon and indicates that decreasing the current in an inductor, or opening a switch in series with an inductor, produces a negative value of V.sub.L, i.e., a reversal in the polarity of the voltage across its terminals. If the magnitude of the reversed voltage exceeds the supply voltage, any number of circuit connections (customarily referred to as "nodes" in circuit theory) can reach potentials which are outside the range of the power supply voltage. In these instances, the anti-parallel PN diode in the MOSFET switch can become temporarily forward-biased.
In a motor driver, for example, shutting off a MOSFET that is connected in series with any of the motor windings will cause inductive flyback. In a push-push (i.e., halfbridge) driver, two switches are stacked one over the other between the supply rails, with the centerpoint between the switches connected to the motor. Generally, the high-side switch is turned on when the low-side switch is turned off, and vice-versa. In reality, however, the MOSFETs cannot be switched simultaneously because of the risk of overlapping on-states, which would produce a catastrophic current "shoot through" between the supply rails. Therefore, it is customary to provide a short "break-before-make" interval between the turn-off of one switch and the turn-on of the other switch, often referred by as a tri-state. Thus, following the turn-off of the low-side switch (with the high-side switch still turned off) the motor winding will drive the output (centerpoint) to a voltage above the positive rail and forward-bias the anti-parallel diode in the high-side MOSFET; and conversely, following the turn-off of the high-side switch (with the low-side switch still turned off) the motor winding will drive the output to a voltage below ground and forward-bias the anti-parallel diode in the low-side MOSFET. In other words, during the tri-state the inductive load will necessarily forward-bias one of the two anti-parallel diodes in the halfbridge. Conduction in the anti-parallel diodes is unavoidable.
In other circuits, such as those used in switching-mode DC-DC convertors and other power supplies, the anti-parallel diodes in the switching MOSFETs are intentionally made to conduct. In these circuits, the MOSFET is connected directionally in the manner of a rectifier so as to allow its parasitic diode to conduct whenever the "switch" of the converter is opened. The gate of the MOSFET is synchronized to cause the MOSFET to shunt current from its diode (through its channel) whenever the anti-parallel diode is forward-biased. Hence, the MOSFET is often described as a "synchronous rectifier". Once again, however, a make-before-break interval is required between the time when the parasitic diode begins to conduct and time when the gate of the MOSFET is driven to turn the channel of the MOSFET on. During the break-before-make interval, the gate of the MOSFET is biased so as to turn the channel off.
Accordingly, as a general rule in this type of circuit, an interval must exist during which the parasitic PN diode in the MOSFET is conducting and before the MOSFET (or some other MOSFET in the circuit) is turned on to divert the current flow from the diode to a channel. Parasitic diode conduction cannot be avoided in most inductive power circuits.
When forward-biased, a PN diode is a minority carrier device and, as such, has a long recovery time compared to majority carrier devices. While the PN diode is forward-biased, minority carriers are stored in the PN diode. In the event that the PN diode once again becomes reverse-biased, the stored minority carriers increase the reverse recovery time of the PN diode (i.e., the time it takes a forward-biased diode to block a voltage applied in the reverse direction). Furthermore, once the minority carriers are removed under reverse-bias, a rapid voltage transient (i.e., large dv/dt) will occur, and voltage spikes beyond the supply voltages may also occur.
This same phenomenon applies to the anti-parallel diode within a MOSFET and can degrade the performance of the MOSFET should its parasitic PN diode become momentarily forward-biased. During the operation of an N-channel MOSFET in Quadrant I (where the source terminal is connected to a lower voltage than the drain terminal), the parasitic diode is reverse-biased and will conduct no current. However, if the MOSFET should operate in Quadrant III (where the source terminal is connected to a higher voltage than the drain terminal), the parasitic diode will become forward-biased and will conduct a current with minority carriers. (Note. Unless otherwise specified herein, in MOSFETs where the body is shorted to a drain/source terminal, the shorted terminal will be referred to as the "source" and the non-shorted terminal will be referred to as the "drain". In instances where the terms source and drain relate to their electrical function rather than their structure, the term "electrical source" or "electrical drain" will be used. For an N-channel MOSFET, the "electrical source" is more negative than the "electrical drain". For a P-channel MOSFET, the reverse is true.)
When the MOSFET returns to Quadrant I operation, the stored charge must be absorbed by the drain-to-source current of the MOSFET. Thus the switching time during the on-off transition and any associated power loss of the MOSFET will be increased. Moreover, at the instant all the stored charge is absorbed a rapid voltage transition (i.e. large dv/dt) may occur. The large dv/dt in turn can cause snapback problems in the MOSFET (a form of undesirable bipolar transistor action), or trigger a latchup condition in an integrated circuit (where control of the device is lost).
If the MOSFET is part of an integrated circuit (IC), the current flowing through the parasitic diode may cause injection of minority carriers into the substrate of the IC. These Minority carriers can travel through the substrate and cause various problems, such as latchup or snapback, in other devices throughout the IC.
Furthermore, the current through the parasitic diode can introduce charges into the IC that become majority carriers in different regions of the IC. In this situation voltage drops will occur in the IC creating a "ground bounce" situation in the IC (i.e., spatially varying ground potentials), which can cause latchup problems.
To avoid the problems caused by the parasitic diode of a MOSFET, the current which would pass through the parasitic diode of the MOSFET during Quadrant III operation can be shunted away from the parasitic diode by placing a shunting device in parallel with the diode. Moreover, a shunting device can also be used in parallel with any PN diode in order to prevent the problems caused by the minority carriers of a PN diode. Ideally, the shunting device should conduct no current when the PN diode is reverse-biased and turn on at a lower voltage than the PN diode when the PN diode is forward-biased. Due to the physical properties of silicon, silicon PN diodes have a turn-on voltage of 0.6 to 0.8 V. Within this range, a higher forward-bias voltage corresponds to higher current densities and more stored minority carrier charge. Therefore, the shunting device should have a turn-on voltage less than 0.6 V. Furthermore, for the parasitic diode of a MOSFET, the shunting device should also have a low recovery time so that the turn-off time of the MOSFET will not be degraded by the shunting device.
It is known in the art to use a Schottky diode as the shunting device. A Schottky diode is characterized by a low turn-on voltage (typically 0.2 to 0.3 volts), fast turn-off, and non-conductance when the Schottky diode is reverse-biased. Therefore, a Schottky diode can perform the functions of the shunting device.
However, to add Schottky diodes to an IC requires additional process steps. Specifically, to create a Schottky diode a metal-silicon barrier must be formed. In order to obtain the proper characteristics for the Schottky diode, the barrier metal will likely be different than the metal used in other process steps, such as metal ohmic contacts. These additional steps add cost and complexity to the IC.
Alternatively, discrete Schottky diodes can be connected in parallel with the MOSFET or PN diode of the IC in a multi-chip solution. However, in this type of connection there will exist various resistances, capacitances, and inductances within the connecting wires that may delay the Schottky diode's turn-on so that the parasitic or stand-alone PN diode will turn on before the Schottky diode. Furthermore, the use of discrete Schottky diodes is not ideal, since the clamping of the parasitic or stand-alone diode should be localized by placing the Schottky diode as close as possible to the parasitic or stand-alone diode.
Therefore, what is needed is a shunting device which can be manufactured in an IC without requiring additional process steps, and which has a turn-on voltage lower than that of a silicon diode, a fast recovery time when switched from a forward-bias to reverse-bias condition, and non-conductance under reverse bias. Ideally, the shunting device could be merged into the power MOSFET itself without compromising the on-resistance or current density of the device.